Please use this identifier to cite or link to this item: https://gnanaganga.inflibnet.ac.in:8443/jspui/handle/123456789/6477
Title: QCA Based Low Power Parallel Binary Adder/Subtractor Using Reversible Logic Gates
Authors: A G. Sasikala
S. Maragatharaj
Issue Date: 2014
Publisher: I-manager's Journal on Electronics Engineering
Abstract: Quantum Dot Cellular Automata (QCA) is an emerging nanotechnology in the field of Quantum electronics for low power consumption and high speed of operational phenomenon. Such type of circuit can be used in many digital applications where CMOS [Complementary Metal Oxide Semiconductor] circuits cannot be used due to high leakage and low switching speed. Also, reversible logic is becoming a more and more prominent technology having its applications in low power CMOS, quantum computing, nanotechnology, and optical computing. Reversibility plays an important role when energy efficient computations are considered. By combining both of these low power and area efficient QCA technologies, the author can make a new generation low power system. In this paper, reversible eight-bit parallel binary adder/Sub tractor using QCA has been proposed. This method reduces the total area used compared to the normal CMOS based structures and reduces power dissipation by using reversible logic gates.
URI: http://gnanaganga.inflibnet.ac.in:8080/jspui/handle/123456789/6477
Appears in Collections:Articles to be qced

Files in This Item:
File SizeFormat 
QCA BASED LOW POWER PARALLEL BINARY ADDER.pdf3.07 MBAdobe PDFView/Open


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.