Please use this identifier to cite or link to this item: https://gnanaganga.inflibnet.ac.in:8443/jspui/handle/123456789/2122
Title: Efficient String Matching FPGA for speed up Network Intrusion Detection
Authors: Joseph, J Armstrong
Korah, Reeba
Salivahanan, S
Keywords: Intrusion detection system
Network Intrusion Detection System
FPGA
Performance Efficiency Metric (PEM)
Issue Date: Mar-2018
Publisher: Applied Mathematics & Information Sciences
Citation: Vol. 12, No. 2; pp. 397-404
Abstract: Malicious attacks and threats over network can be identified and prevented by Intrusion detection system (IDS). Essential ability of every intrusion detection system is to search and find packet content that can matches distinguished attacks. An open source Network Intrusion Detection System (NIDS) is Snort that utilizes signatures/rules for detecting irregular network activities. Softwarebased IDSmay not be continued to process all traffic in real-time when network traffic increased. On the other hand, hardware based IDS are best suited for computing and serious processing on network traffic and can keep up high network throughput. This paper, contributes Buffered Boyer-Moore string-matching algorithm using FPGA that drastically increase throughput and improve its performance on hardware implementations. The projected performance as Performance Efficiency Metric (PEM) 21.3 enables system to do 19.2 Gbps of throughput and implies a significant difference obtained when processing large number of payload.
URI: http://dx.doi.org/10.18576/amis/120214
http://gnanaganga.inflibnet.ac.in:8080/jspui/handle/123456789/2122
ISSN: 1935-0090
2325-0399
Appears in Collections:Journal Articles

Files in This Item:
There are no files associated with this item.


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.