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DC Field | Value | Language |
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dc.contributor.author | Manchala, Venkata Subba Rao | - |
dc.contributor.author | Sahoo, Satyajeeth | - |
dc.contributor.author | Murthy, G Ramana | - |
dc.date.accessioned | 2023-12-09T08:56:03Z | - |
dc.date.available | 2023-12-09T08:56:03Z | - |
dc.date.issued | 2022 | - |
dc.identifier.citation | pp. 445-450 | en_US |
dc.identifier.isbn | 9781665466332 | - |
dc.identifier.uri | https://doi.org/10.1109/ICRTCST54752.2022.9781952 | - |
dc.identifier.uri | http://gnanaganga.inflibnet.ac.in:8080/jspui/handle/123456789/2256 | - |
dc.description.abstract | This work deals with designing a novel XOR-cell for attain full swing voltage at high-speed operation. It is the basic building block for the design of any kind of full adder. The performance analysis and driving capability of the adder completely depend on XOR-cell only. Nevertheless, this XOR-cell is the major power consumption block in any kind of adder which achieves the full swing based on the CMOS-inverter and CMOS-Pass Transistor Logic (C-PTL). Hybrid Full Adder(HFA) is designed using three modules i.e XOR-cell, Transmission gate(TG), and Level restorer (LR). Among these three designs, TG-gate has a superior quality of achieving high-speed operation and low short circuit power. Performance parameters such as power, delay, Power-delay Product (PDP), Energy-delay product (EDP) are calculated and the simulation results are performed at a frequency of 1GHz in cadence virtuoso tool-45nm technology having a supply voltage (Vdd) of 0.8 V. This proposed Hybrid full adder is well suited for high-speed operation in IoT based-Applications. © 2022 IEEE. | en_US |
dc.language.iso | en | en_US |
dc.publisher | 4th International Conference on Recent Trends in Computer Science and Technology, ICRTCST 2021 | en_US |
dc.subject | Complementary-Metal Oxide Semiconductor (C-MOS) | en_US |
dc.subject | Hybrid Full Adder (HFA) | en_US |
dc.subject | Level-Restorer(LR) | en_US |
dc.subject | Transmission gate(TG) | en_US |
dc.title | Design and Analysis of Novel Xor/Xnor Based Hybrid Full Adder For Iot-Applications | en_US |
dc.type | Article | en_US |
Appears in Collections: | Conference Papers |
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