Please use this identifier to cite or link to this item: https://gnanaganga.inflibnet.ac.in:8443/jspui/handle/123456789/4760
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dc.contributor.authorNithya, N-
dc.contributor.authorItapu, Srikanth-
dc.date.accessioned2024-01-10T10:04:50Z-
dc.date.available2024-01-10T10:04:50Z-
dc.date.issued2023-09-04-
dc.identifier.isbn9798350334395-
dc.identifier.isbn9798350334401-
dc.identifier.issn2766-2101-
dc.identifier.issn2334-0940-
dc.identifier.urihttps://doi.org/10.1109/CONECCT57959.2023.10234778-
dc.identifier.urihttp://gnanaganga.inflibnet.ac.in:8080/jspui/handle/123456789/4760-
dc.description.abstractThis paper’s major objective is to suggest a creative strategy for improving CPU performance in real-time operating systems by developing a fresh way for the round-robin CPU scheduling algorithm. Round-robin and priority scheduling methods are combined in the proposed method to create the Priority based Round-Robin CPU Scheduling algorithm. This algorithm addresses the starvation prevention issue present in round-robin scheduling while including the benefits of priority ordering. By giving different priorities to processes, it also adds the idea of ageing. Due to its flaws, such as high context transition rates, prolonged wait times, lengthy responses, prolonged turnaround times, and limited throughput, the current round-robin CPU scheduling algorithms are not suited for real-time operating systems. These restrictions are removed by the suggested approach, which also fixes the round-robin algorithm’s problems. The study compares the proposed algorithm with the existing round-robin scheduling method based on a number of variables, including time quantum, average waiting time, average turnaround time, and number of context shifts, in order to assess its efficacy. Although the semiconductor industry has a lot of interest in CPU-GPU multi-core research, the problems raised in the literature have not yet been solved. This project focuses on the creation of a novel heterogeneous crossbar style network-on-chip (NoC) that connects heterogeneous CPU-GPU processors in order to overcome these issues.en_US
dc.language.isoenen_US
dc.publisher2023 IEEE International Conference on Electronics, Computing and Communication Technologies (CONECCT)en_US
dc.subjectJob shop schedulingen_US
dc.subjectProgram processorsen_US
dc.subjectScheduling algorithmsen_US
dc.subjectMulticore processingen_US
dc.subjectOperating systemsen_US
dc.subjectNetwork-on-chipen_US
dc.subjectComputer architectureen_US
dc.titleDesign Of Low Area Interconnect Architecture for CPU-GPU Network-On-Chips (NoCs)en_US
dc.typeArticleen_US
Appears in Collections:Journal Articles

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