Please use this identifier to cite or link to this item: https://gnanaganga.inflibnet.ac.in:8443/jspui/handle/123456789/6775
Full metadata record
DC FieldValueLanguage
dc.contributor.authorRajashree Narendra-
dc.contributor.authorM. L. Sudheer-
dc.date.accessioned2024-02-27T06:00:33Z-
dc.date.available2024-02-27T06:00:33Z-
dc.date.issued2015-
dc.identifier.urihttp://gnanaganga.inflibnet.ac.in:8080/jspui/handle/123456789/6775-
dc.description.abstractComplex electronics devices are becoming more sensitive to electrostatic discharge (ESD). These components are being developed with higher density (extra memory bits per unit volume) and are becoming faster (MHz, GHz, THz, etc.). Indirect and direct air/contact discharge test has been conducted on the ALS-SDA-CPLD/FPGA trainer kit connected to the digital to analog converter (DAC) module. The Field Programmable Gate Arrays (FPGA) and Complex Programmable Logic Devices (CPLD) are found to be very ESD sensitive. The FPGA 3s50 IC was affected during the contact discharge to input pin. There was damage to the I/O pin bond pad as well as the metal top layer. There was dielectric breakdown damage observed in the CPLD 9572 IC.-
dc.publisherManufacturing Technology Today-
dc.titleESD Failure Analysis of FPGA and CPLD IC-
dc.volVol 14-
dc.issuedNo 4-
Appears in Collections:Articles to be qced

Files in This Item:
File SizeFormat 
ESD FAILURE ANALYSIS OF FPGA AND CPLD IC.pdf
  Restricted Access
2.46 MBAdobe PDFView/Open Request a copy


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.