Please use this identifier to cite or link to this item:
https://gnanaganga.inflibnet.ac.in:8443/jspui/handle/123456789/7146
Title: | Review on Custom and Semicustom Designs for Multibit Arithmetic Logic Units Using CMOS |
Authors: | Aparna Gupta Rita Jain |
Issue Date: | 2017 |
Publisher: | Anusandhan: AISECT University Journal |
Abstract: | In this paper authors have presented an extensive review on literature on designing of multibit arithmetic logic units based on custom and semicustom techniques. A brief review is carried out for proposed design and will be done using MOSIS C5 process for VLSI. Arithmetic Logic Unit is a digital circuit that performs arithmetic and logical operations. ALU is a fundamental building block of central processing unit of a computer which is used in the simplest microprocessors for purpose of maintaining timers. Previously, many efficient architecture have been introduced for the design of low complexity operation, but we have given attention to custom designing of ALU, where every sub module is designed simulated and verified then routed accordingly. The proposed design of ALU will performs the mathematical, logical, and shifting operations like Addition, Subtraction, Multiplication, Increment, Decrement, Logical AND, Logical OR, Logical XOR etc. in the computer. In this paper, the efficient modules of ALU will be design using Custom Tools like Electric CAD and simulation results will be verified on same platform using test benches and SPICE simulations. |
URI: | http://gnanaganga.inflibnet.ac.in:8080/jspui/handle/123456789/7146 |
Appears in Collections: | Articles to be qced |
Files in This Item:
File | Size | Format | |
---|---|---|---|
Review on Custom and Semicustom Designs for Multibit Arithmetic Logic.pdf Restricted Access | 3.27 MB | Adobe PDF | View/Open Request a copy |
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.