Numerical Modelling of Chaotic System and Its FPGA Implementation

Abstract

Now a days Chaos based sysLems play an imporlanl role specifically in secure communicalion and cryplography. Chaolic sys/ems have wide applications in random number genera/Ors, image encryplion, Optical secure circuits, and quanLum applicalions. The FPGA implemen/alion has certain advantages over analog one as FPGA implemenlalion of any system is having a more flexible architecture and have low cost testing cycles, nowadays more emphasis is given to realize di./Jerenl chaoLic sysLems in FPGA. This paper demonstrates the steps for FPGA implementalion of a chaotic sys/em using Euler's algorilhm. Top level, second level and third level designs are also presented. The design is implemenled using f'erilog and lested wilh Xilinx vivado v.2017.3 design suite in Artix-7 Nexys 4 DDR. Simulation results presenLed demonstraLes the liming diagram and resource uLilization.