Fpga Implementation of Chaotic Generator Using Numerical Algorithms

Abstract

Now a day's chaotic systems have an important role in secure communication and cryptography. As FPGA implementation have certain advantages over analog one, different chaotic system like chaotic oscillator, True random number generators and chaotic systems used in image processing, optical circuits for secure communications were successfully realized in FPGA. This paper presents methodology of FPGA implementation of any chaotic system using different numerical algorithm. In study the Numerical solution of Differential equations given in Pandey-Baghel-Singh system were obtained and coded in Verilog and tested with Xilinx Vivado 17.3 design suites in Artix-7 Nexus 4 DDR and Basys3. Performance of the FPGA based chaotic generator using Heun and RK4 algorithms are analysed using 106 data sets with the maximum operating frequency achieved up to 359.71 MHz.