Please use this identifier to cite or link to this item: https://gnanaganga.inflibnet.ac.in:8443/jspui/handle/123456789/724
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dc.contributor.authorGajula, Ramana Murthy-
dc.date.accessioned2023-05-24T09:44:37Z-
dc.date.available2023-05-24T09:44:37Z-
dc.date.issued2022-07-18-
dc.identifier.urihttps://doi.org/10.1016/j.seta.2022.102506-
dc.identifier.urihttp://gnanaganga.inflibnet.ac.in:8080/jspui/handle/123456789/724-
dc.description.abstractThis paper deals with designing an optimized hybrid Operational Transconductance Amplifier (OTA) employing a technique called source degeneration with adaptive biasing that can be used for high frequency applications. This work targets implementation of a simple technique with less number of circuit elements which reduces the die area and power consumption and gives rise to good results. The circuit has been designed to operate with a supply voltage of ±1 V along with a bias current. The linearity which is the major drawback of the conventional Complementary Metal Oxide Semiconductor (CMOS) OTA gets improved with source degeneration technique using a non-CMOS non-volatile memory (so-called memristor). The gain-bandwidth product gets improved for an 80pF load. A biquad OTA-C filter is designed and implemented utilizing the OTA designed in this work as an application example. The realization of a high pass filter has been demonstrated. All the simulations were carried out in the Cadence® Virtuoso environment using 180 nm CMOS technology. Another facet of this paper is the memristor compatibility with the CMOS process technology.en_US
dc.language.isoenen_US
dc.publisherSustainable Energy Technologies and Assessmentsen_US
dc.subjectOperational Transconductance Amplifieren_US
dc.subjectMemristoren_US
dc.subjectSource degenerationen_US
dc.subjectAdaptive biasingen_US
dc.titleHybrid CMOS-Memristor based operational transconductance amplifier for high frequency applicationsen_US
dc.typeArticleen_US
Appears in Collections:Journal Articles

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