Hybrid Full Adder design using novel XOR/XNOR-cell for DSP- Applications

Abstract

In this paper, two individual novels XOR, XNOR-cells design, and its analysis is reported. The main objective of designing XOR/XNOR-cell is to attain full swing voltage at a high speed of operation. It is a basic building block for any full adder design. So, the performance analysis and driving capability completely depend on the performance of the proposed XOR/XNOR-cell. Nevertheless, this cell is the major power consumption block in any adder circuit design, which achieves full swing based on the CMOS-inverter and Pass Transistor Logic(C-PTL) and Level Restorer (LR) logics. Hybrid Full Adder(HFA) is developed by both CMOS-logic and Transmission gate (TG) logic. It has a superior quality of high-speed operation and low short circuit

power compared to conventional full adder design, which is analyzed and simulated in cadence virtuoso 45nm technology with a supply voltage (Vdd) of 1.0 V, and 0.8 V at a frequency of 1GHz respectively. Performance parameters such as power, delay, Power delay Product (PDP), and Energy delay product (EDP), are tabulated. So,the Proposed HFA is well suited for high-speed DSP-based Applications.