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Alliance University, Bengaluru
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Showing results 1 to 2 of 2
Issue Date
Title
Author(s)
2018
Design and Analysis of Low Power, Area Efficient Skip Logic For Cska Circuit In Arithmetic Unit
Vijayakumar, S
;
Jayaprakasan, V
;
Korah, Reeba
2023-03
Low Power Full Adders based on Proposed Hybrid and GDI Designs: A Novel Approach
Anand, Anubhav
;
Singh, Satyam
;
Dhariwal, Sandeep
;
Korah, Reeba
;
Kumar, Gaurav