Please use this identifier to cite or link to this item:
https://gnanaganga.inflibnet.ac.in:8443/jspui/handle/123456789/2171
Title: | A Network Based Intrusion Detection System In Dynamic Reconfigurable Architecture |
Authors: | Joseph, J Armstrong Korah, Reeba Salivahanan |
Keywords: | Dynamic Reconfigurable Architecture FPGA Network IDS Potential exploitation of parallelism Snort rules |
Issue Date: | 2015 |
Publisher: | International Journal of Applied Engineering Research |
Citation: | Vol. 10, No. 92; pp. 149-154 |
Abstract: | Network based Intrusion detection system are passive and non-intrusive devices that are listen on network without interfering network operations and monitors as security from attacks. Regular expressions have been adopted in pattern matching to detect intrusion over network. Reconfigurable hardware such as FPGA devices provides to achieve high performance in terms of processing time. In this work, matching modules functionality described through Snort rule based option controlled by Finite sate machine in Dynamic Reconfigurable Architecture using Verilog HDL. The speedups achieve by minimize the reconfiguration latencies, reducing memory access time and simulation time are analyzed using Xilinx ISE design suite13.2 tool. The processing time for a single packet is 37 ?S. © 2015, Research India Publications. All rights reserved. |
URI: | https://www.ripublication.com/ijaerspl2015/ijaer10n92spl_23.pdf http://gnanaganga.inflibnet.ac.in:8080/jspui/handle/123456789/2171 |
ISSN: | 0973-4562 0973-9769 |
Appears in Collections: | Journal Articles |
Files in This Item:
There are no files associated with this item.
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.