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https://gnanaganga.inflibnet.ac.in:8443/jspui/handle/123456789/699
Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Paul, P. Mano | - |
dc.date.accessioned | 2023-05-22T09:11:41Z | - |
dc.date.available | 2023-05-22T09:11:41Z | - |
dc.date.issued | 2022-08-05 | - |
dc.identifier.uri | 10.24425/ijet.2022.141275 | - |
dc.identifier.uri | http://gnanaganga.inflibnet.ac.in:8080/jspui/handle/123456789/699 | - |
dc.description.abstract | This work describes a 4-bit Flash ADC with low power consumption. The performance metrics of a Flash ADC depend on the kind of comparator and encoder used. Hence openloop comparator and mux-based encoder are used to obtain improved performance. Simulation results show that the simulated design consumes 0.265mW of power in 90nm CMOS technology using cadence-virtuoso software. The circuit operates with an operating frequency of 100MHz and a supply voltage of 1V. | en_US |
dc.language.iso | en | en_US |
dc.publisher | Pan Journals | en_US |
dc.subject | FLASH ADC | en_US |
dc.subject | Low Power | en_US |
dc.subject | Dynamic Comparator | en_US |
dc.subject | Encoder | en_US |
dc.title | Design of Low–power 4-bit Flash ADC Using Multiplexer Based Encoder in 90nm CMOS Process | en_US |
dc.type | Article | en_US |
Appears in Collections: | Journal Articles |
Files in This Item:
File | Description | Size | Format | |
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15-3364-12088-1-PB.pdf Restricted Access | 818.77 kB | Adobe PDF | View/Open Request a copy |
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