Please use this identifier to cite or link to this item: https://gnanaganga.inflibnet.ac.in:8443/jspui/handle/123456789/699
Full metadata record
DC FieldValueLanguage
dc.contributor.authorPaul, P. Mano-
dc.date.accessioned2023-05-22T09:11:41Z-
dc.date.available2023-05-22T09:11:41Z-
dc.date.issued2022-08-05-
dc.identifier.uri10.24425/ijet.2022.141275-
dc.identifier.urihttp://gnanaganga.inflibnet.ac.in:8080/jspui/handle/123456789/699-
dc.description.abstractThis work describes a 4-bit Flash ADC with low power consumption. The performance metrics of a Flash ADC depend on the kind of comparator and encoder used. Hence openloop comparator and mux-based encoder are used to obtain improved performance. Simulation results show that the simulated design consumes 0.265mW of power in 90nm CMOS technology using cadence-virtuoso software. The circuit operates with an operating frequency of 100MHz and a supply voltage of 1V.en_US
dc.language.isoenen_US
dc.publisherPan Journalsen_US
dc.subjectFLASH ADCen_US
dc.subjectLow Poweren_US
dc.subjectDynamic Comparatoren_US
dc.subjectEncoderen_US
dc.titleDesign of Low–power 4-bit Flash ADC Using Multiplexer Based Encoder in 90nm CMOS Processen_US
dc.typeArticleen_US
Appears in Collections:Journal Articles

Files in This Item:
File Description SizeFormat 
15-3364-12088-1-PB.pdf
  Restricted Access
818.77 kBAdobe PDFView/Open Request a copy


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.