Please use this identifier to cite or link to this item:
https://gnanaganga.inflibnet.ac.in:8443/jspui/handle/123456789/699
Title: | Design of Low–power 4-bit Flash ADC Using Multiplexer Based Encoder in 90nm CMOS Process |
Authors: | Paul, P. Mano |
Keywords: | FLASH ADC Low Power Dynamic Comparator Encoder |
Issue Date: | 5-Aug-2022 |
Publisher: | Pan Journals |
Abstract: | This work describes a 4-bit Flash ADC with low power consumption. The performance metrics of a Flash ADC depend on the kind of comparator and encoder used. Hence openloop comparator and mux-based encoder are used to obtain improved performance. Simulation results show that the simulated design consumes 0.265mW of power in 90nm CMOS technology using cadence-virtuoso software. The circuit operates with an operating frequency of 100MHz and a supply voltage of 1V. |
URI: | 10.24425/ijet.2022.141275 http://gnanaganga.inflibnet.ac.in:8080/jspui/handle/123456789/699 |
Appears in Collections: | Journal Articles |
Files in This Item:
File | Description | Size | Format | |
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15-3364-12088-1-PB.pdf Restricted Access | 818.77 kB | Adobe PDF | View/Open Request a copy |
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